Electrical Engineering 577b
VLSI Design Projects Class
Partial Syllabus


WWW: http://www-classes.usc.edu/engr/ee-s/577bb/syllabus.html


Topic # of Weeks Readings/Homeworks
Class Introduction 1 DSM Challenges (Rabaey)
On-line cadence tutorials
Homework 1: Introduction to Cadence (TBA)
Introduction to Verilog 1 See Dr. Tzartzanis's lecture notes on Verilog
Structural and RTL Verilog Examples (pdf)
Homework 2: Introduction to Verilog (TBA)
Asynchronous Design
    Abstract processes communicating with channels
    Channel implementations and protocols
    Asynchronous process designs
    Modeling with petri nets and signal transistion graphs
    Other asynchronous approaches
4 Intro to Asynchronous Design I (pps) (pdf) (pdf-2up)
QDI Fine-Grain Pipeline Templates (ppt) (pps) (pdf-2up)
Petri Nets and Performance Optimization (ppt) (pps)
Andrew Lines MS Thesis (ps)
Intro to CSP and CHP (ppt)
Myers' Lecture on CHP (ps)
Martin's Chapter on CHP (ps)
CHP and Verilog Modeling of Asynchronous Pipelines (ppt)
Notes on Phillips Tangram QDI Circuits (pdf)

The Differential Equation Solver: Hybrid Datapath Design and Distributed Extended Burst Mode Control (pdf)

The RAPPID design: Architectural average-case optimization and self-resetting circuits (ppt)

Homework 3: Verilog design of a synchronous and asynchronous bit-level pipelined ripple carry adder (TBA)
Homework 4: Verilog structural design of ripple carry adder (TBA)
Introduction to FIR filter class project
    Specification
    Memory design review
    Accumulator/Multiplier design review
    Dynamic logic design review
    Clocking design review
    Resource sharing tradeoffs
    Performance tradeoffs
3 Project Description
Mark Horowitz's EE271 Lecture Note on Memory
Mark Horowitz's EE371 Lecture Note on Memory
Mark Horowitz's EE371 Lecture Note on Multiplier
Lecture Note on Register File
Advanced Design Techniques
    Advanced domino logic design
    Low-swing signalling
    Transistor sizing using the notion of logic effort
    High-speed synchronous clocking methodology
    Noise and cross-talk issues
5 Mark Horowitz's EE371 Lecture Note on Flip-flop/Latch
Mark Horowitz's EE371 Lecture Note on Skew Tolerant Domino Logic
Mark Horowitz's EE371 Lecture Notes on Input/Output Design
Mark Horowitz's EE371 Lecture Notes on Transmitter and Receiver Design
Marcos Ferretti's Low Swing Poster & Notes
Jay Moon's Resonant Clock Driver Slide Jay Moon's ER Techniques